gecko3:system_bus:logical_order

System bus in logical order

On this page, the system bus is ordered by the logic blocks of the bus.

Pin Block Name Description
Byte 1
61 B1.0 M1_INA
63 B1.1 M1_INB
65 B1.2 M2_INA
67 B1.3 M2_INB
69 B1.4 M3_INA
71 B1.5 M3_INB
73 B1.6 M4_INA
75 B1.7 M4_INB
Byte 2
62 B2.0 M1_ENA
64 B2.1 M1_ENB
66 B2.2 M2_ENA
68 B2.3 M2_ENB
70 B2.4 M3_ENA
72 B2.5 M3_ENB
74 B2.6 M4_ENA
76 B2.7 M4_ENB
Byte 3
4 B3.0 GPIO1_0
6 B3.1 GPIO1_1
11 B3.2 GPIO1_2
14 B3.3 GPIO1_3
13 B3.4 GPIO1_4
16 B3.5 GPIO1_5
15 B3.6 GPIO1_6
18 B3.7 GPIO1_7
Byte 4
17 B4.0 GPIO1_8
20 B4.1 GPIO1_9
19 B4.2 GPIO1_10
22 B4.3 GPIO1_11
21 B4.4 GPIO1_12
24 B4.5 GPIO1_13
23 B4.6 GPIO1_14
26 B4.7 GPIO1_15
Byte 5
25 B5.0 GPIO1_16
28 B5.1 GPIO1_17
27 B5.2 GPIO1_18
84 B5.3 GPIO1_19
85 B5.4 GPIO1_20
86 B5.5 GPIO1_21
87 B5.6 GPIO1_22
88 B5.7 GPIO1_23
Byte 6
91 B6.0 GPIO1_24
92 B6.1 GPIO1_25
93 B6.2 GPIO1_26
94 B6.3 GPIO1_27
95 B6.4 GPIO1_28
96 B6.5 GPIO1_29
97 B6.6 GPIO1_30
98 B6.7 GPIO1_31
Byte 7
99 B7.0 GPIO1_32
100 B7.1 GPIO1_33
101 B7.2 GPIO1_34
102 B7.3 GPIO1_35
103 B7.4 GPIO1_36
104 B7.5 GPIO1_37
105 B7.6 GPIO1_38
106 B7.7 GPIO1_39
Byte 8
107 B8.0 GPIO1_40 TxD0 (transmitted data) of GECKO3xx as RS-232
108 B8.1 GPIO1_41 RxD0 (received data) of GECKO3xx as RS-232
109 B8.2 GPIO1_42 DTR0 (data terminal ready) of GECKO3xx as RS-232
110 B8.3 GPIO1_43 DSR0 (data set ready) of GECKO3xx as RS-232
111 B8.4 GPIO1_44 RTS0 (request to send) of GECKO3xx as RS-232
112 B8.5 GPIO1_45 CTS0 (clear to send) of GECKO3xx as RS-232
113 B8.6 GPIO1_46 DCD0 (carrier detect) of GECKO3xx as RS-232
114 B8.7 GPIO1_47 RI0 (ring indicator) of GECKO3xx as RS-232
Byte 9
115 B9.0 GPIO1_48 SCK (serial clock) of GECKO3xx as SPI-Master
116 B9.1 GPIO1_49 MOSI (master out slave in) of GECKO3xx as SPI-Master
117 B9.2 GPIO1_50 MISO (master in slave out) of GECKO3xx as SPI-Master
118 B9.3 GPIO1_51 CS1 of GECKO3xx as SPI-Master
77 B9.4 LineSensorIn1 CS2 of GECKO3xx as SPI-Master
78 B9.5 LineSensorOut1 CS3 of GECKO3xx as SPI-Master
79 B9.6 LineSensorIn2 CD of GECKO3doking for SD-Card
80 B9.7 LineSensorOut2 WD of GECKO3doking for SD-Card
Pin Name Description
1 GND System GND
2 GND System GND
5 GND System GND
8 GND System GND
9 GND System GND
12 GND System GND
29 GND System GND
30 GND System GND
33 GND System GND
34 GND System GND
41 GND System GND
42 GND System GND
43 GND System GND
44 GND System GND
45 GND System GND
46 GND System GND
53 GND System GND
54 GND System GND
55 GND System GND
56 GND System GND
59 GND System GND
60 GND System GND
89 GND System GND
90 GND System GND
119 GND System GND
120 GND System GND
31 VBUS USB supply voltage, provided if one of the modules is connected to an USB port. Can for example be used to charge batteries. According to the USB specification the voltage is in the range of 4.3 to 5.5 V. To avoid that a high equalising current flows between two modules (where each is connected to a USB port) connect a diode between the USB port and the VBUS signal.
32 VBUS USB supply voltage
35 VBAT System battery voltage. In the voltage range of one LiPo Cell (3.7 - 4.5 V). If the board is powered from a different voltage source (such as a LiPo battery with multiple cells in series) the VBAT line must be powered by a voltage regulator with at least 3.3 V. One simple solution is to shorten VBAT with the +3V3 line.
36 VBAT System battery voltage, 3.3 - 4.5 V
37 VBAT System battery voltage, 3.3 - 4.5 V
38 VBAT System battery voltage, 3.3 - 4.5 V
39 VBAT System battery voltage, 3.3 - 4.5 V
40 VBAT System battery voltage, 3.3 - 4.5 V
47 +3V3 System 3.3 V supply
48 +3V3 System 3.3 V supply
49 +3V3 System 3.3 V supply
50 +3V3 System 3.3 V supply
51 +3V3 System 3.3 V supply
52 +3V3 System 3.3 V supply
Pin Name Description
Clock signals
7 EXTCLK0 Clock line 0, for external or stack internal clock signal distribution. Around the clock lines ground pins are placed to get a pseudo coaxial behavior of the line.
10 EXTCLK1 Clock line 1, for external or stack internal clock signal distribution. Around the clock lines ground pins are placed to get a pseudo coaxial behavior of the line.
Line sensor signal
82 LineSensorClk Clock output signal to trigger the D flip-flop of the line sensors
Reset signal
3 nRESET Global reset pin. If low all modules connected to the bus will be reseted. The reset can be done by the USB controller, the FPGA on GECKO3main, by hand or by one of the additional modules connected to the bus. To avoid destroying your reset circuit make sure only one pull-up resistor is mounted on only one board when stacking those together. Additionally make sure ICs as FPGAs and FX2 are only using three-state outputs connected together with the reset circuit. If you do not follow this approach you will risk destroying the reset circuit.
Status signals
57 LOW_BATTERY Low battery indicating line. This line is pulled high from the power supply module if the battery will get empty
58 POWER_GOOD POK line. This signal is normal high and is pulled low if the power supply is overloaded or faulty
Communication (I2C)
81 SDA I2C Bus data line, normaly all I2C components on the GECKO3 modules are connected to one bus. Place 2.2 kOhm Pull-Up resistors on controller boards
83 SCL I2C Bus clock line
Pin Block Signal Name Description
Byte 10
3 B10.0 GPIO2_0
4 B10.1 GPIO2_1
5 B10.2 GPIO2_2
6 B10.3 GPIO2_3
7 B10.4 GPIO2_4
8 B10.5 GPIO2_5
9 B10.6 GPIO2_6
10 B10.7 GPIO2_7
Byte 11
11 B11.0 GPIO2_8
12 B11.1 GPIO2_9
13 B11.2 GPIO2_10
14 B11.3 GPIO2_11
15 B11.4 GPIO2_12
16 B11.5 GPIO2_13
17 B11.6 GPIO2_14
18 B11.7 GPIO2_15
Byte 12
19 B12.0 GPIO2_16
20 B12.1 GPIO2_17
21 B12.2 GPIO2_18
22 B12.3 GPIO2_19
23 B12.4 GPIO2_20
24 B12.5 GPIO2_21
25 B12.6 GPIO2_22
26 B12.7 GPIO2_23
Byte 13
27 B13.0 GPIO2_24
28 B13.1 GPIO2_25
29 B13.2 GPIO2_26
30 B13.3 GPIO2_27
31 B13.4 GPIO2_28
32 B13.5 GPIO2_29
33 B13.6 GPIO2_30
34 B13.7 GPIO2_31
Byte 14
35 B14.0 GPIO2_32
36 B14.1 GPIO2_33
37 B14.2 GPIO2_34
38 B14.3 GPIO2_35
39 B14.4 GPIO2_36
40 B14.5 GPIO2_37
41 B14.6 GPIO2_38
42 B14.7 GPIO2_39
Byte 15
43 B15.0 GPIO2_40
44 B15.1 GPIO2_41
45 B15.2 GPIO2_42
46 B15.3 GPIO2_43
47 B15.4 GPIO2_44
48 B15.5 GPIO2_45
49 B15.6 GPIO2_46
50 B15.7 GPIO2_47
Byte 16
51 B16.0 GPIO2_48
52 B16.1 GPIO2_49
53 B16.2 GPIO2_50
54 B16.3 GPIO2_51
55 B16.4 GPIO2_52
56 B16.5 GPIO2_53
57 B16.6 GPIO2_54
58 B16.7 GPIO2_55
Byte 17
59 B17.0 GPIO2_56
60 B17.1 GPIO2_57
61 B17.2 GPIO2_58
62 B17.3 GPIO2_59
63 B17.4 GPIO2_60
64 B17.5 GPIO2_61
65 B17.6 GPIO2_62
66 B17.7 GPIO2_63
Byte 18
67 B18.0 GPIO2_64
68 B18.1 GPIO2_65
69 B18.2 GPIO2_66
70 B18.3 GPIO2_67
71 B18.4 GPIO2_68
72 B18.5 GPIO2_69
73 B18.6 GPIO2_70
74 B18.7 GPIO2_71
Byte 19
75 B19.0 GPIO2_72
76 B19.1 GPIO2_73
77 B19.2 GPIO2_74
78 B19.3 GPIO2_75
79 B19.4 GPIO2_76
80 B19.5 GPIO2_77
81 B19.6 GPIO2_78
82 B19.7 GPIO2_79
Byte 20
83 B20.0 GPIO2_80
84 B20.1 GPIO2_81
85 B20.2 GPIO2_82
86 B20.3 GPIO2_83
87 B20.4 GPIO2_84
88 B20.5 GPIO2_85
89 B20.6 GPIO2_86
90 B20.7 GPIO2_87
Byte 21
91 B21.0 GPIO2_88
92 B21.1 GPIO2_89
93 B21.2 GPIO2_90
94 B21.3 GPIO2_91
95 B21.4 GPIO2_92
96 B21.5 GPIO2_93
97 B21.6 GPIO2_94
98 B21.7 GPIO2_95
Byte 22
99 B22.0 GPIO2_96
100 B22.1 GPIO2_97
101 B22.2 GPIO2_98
102 B22.3 GPIO2_99
103 B22.4 GPIO2_100
104 B22.5 GPIO2_101
105 B22.6 GPIO2_102
106 B22.7 GPIO2_103
Byte 23
107 B23.0 GPIO2_104
108 B23.1 GPIO2_105
109 B23.2 GPIO2_106
110 B23.3 GPIO2_107
111 B23.4 GPIO2_108
112 B23.5 GPIO2_109
113 B23.6 GPIO2_110
114 B23.7 GPIO2_111
Byte 24
115 B24.0 GPIO2_112
116 B24.1 GPIO2_113
117 B24.2 GPIO2_114
118 B24.3 GPIO2_115
Pin Signal Name Description
1 GND System GND
2 GND System GND
119 GND System GND
120 GND System GND
  • gecko3/system_bus/logical_order.txt
  • Last modified: 2021/12/20 10:49
  • by 127.0.0.1